HierSVA: A Data Synthesis Pipeline, Dataset, and Benchmark for LLM-Driven Hierarchical Hardware Formal Verification
Maohua Nie, Jiang Zhu, Jingqun Zhang, Zhichen Zeng, Jiayi Wang, Sibo Zhang, Jialin Wang, C. -J. Richard Shi
The Fortieth Annual Conference on Neural Information Processing Systems, Dec 2026
@article{Nie2026HierSVA,
author = {Nie, Maohua and Zhu, Jiang and Zhang, Jingqun and Zeng, Zhichen and Wang, Jiayi and Zhang, Sibo and Wang, Jialin and Shi, C. -J. Richard},
doi = {10.48550/ARXIV.2606.13706},
year = {2026},
publisher = {arXiv},
title = {HierSVA: A {Data} {Synthesis} {Pipeline}, {Dataset}, and {Benchmark} for {LLM}-{Driven} {Hierarchical} {Hardware} {Formal} {Verification}},
url = {https://arxiv.org/abs/2606.13706},
}
CHIALU: A Comprehensive ALU Generation and Optimization Library
Maohua Nie, Sibo Zhang, Jiayi Wang, Ang Li, C. -J. Richard Shi
First International Workshop on Agentic Approaches to Computer Architecture, Nov 2026
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