This person is busy changing the world...
Jiayi Wang and Jingqun Zhang will join NVIDIA this summer — Computer Performance Intern and GPU Profiling & Tools Intern. Congrats!
All-Digital Bluetooth Low Energy (BLE) Backscatter ASIC using Standard I/O Pad Drivers in 180 nm CMOS accepted to RFID 2026, congrats to Ryan, Kate, Te Min, Andrew Pan (undergraduate team on Ang Li 's digital VLSI tape-out class, EE 478, Spr 2025) and our collaborators from Prof. Matt Reynolds' research lab!
DICE: Enabling Efficient General-Purpose SIMT Execution with Statically Scheduled Coarse-Grained Reconfigurable Arrays accepted to ISCA 2026, congrats to Jiayi Wang, Darren Lu, and Zhichen Zeng!
"STEP: Spatially Threaded Execution Pipeline" accepted to the LATTE workshop at ASPLOS 2026, congrats to Darren Lu and Jiayi Wang!
TransDot: An Area-efficient Reconfigurable Floating-Point Unit for Trans-Precision Dot-Product Accumulation for FPGA AI Engines accepted as a short paper at FCCM 2026, congrats to Jiayi Wang, Maohua, and Sin-Chen!
"piPE-SA: Enabling Deeply Pipelined Processing Elements in Systolic Arrays" accepted to the EMC2 workshop at ASPLOS 2026, congrats to Jiayi Wang and Chenyi Wang!
"CacheFlex: Explicitly Control What You Need in Your Cache" accepted to the EMC2 workshop at ASPLOS 2026, congrats to Jingqun Zhang, Yung-Jen Cheng, Jiayi Wang, Shwet Chitnis, and all!
Welcome our first PhD cohort, Jiayi Wang, Jingqun Zhang, Darren Lu, and Zhichen Zeng!
DICE: Enabling Efficient General-Purpose SIMT Execution with Statically Scheduled Coarse-Grained Reconfigurable Arrays
Jiayi Wang, Darren Lu, Zhichen Zeng, Ang Li
The 53rd IEEE/ACM International Symposium on Computer Architecture, Jun 2026
@article{Wang2026DICE,
author = {Wang, Jiayi and Da Lu, Ang and Zeng, Zhichen and Li, Ang},
doi = {10.48550/ARXIV.2605.05496},
year = {2026},
publisher = {arXiv},
title = {DICE: Enabling {Efficient} {General}-{Purpose} {SIMT} {Execution} with {Statically} {Scheduled} {Coarse}-{Grained} {Reconfigurable} {Arrays}},
url = {https://arxiv.org/abs/2605.05496},
}
All-Digital Bluetooth Low Energy (BLE) Backscatter ASIC using Standard I/O Pad Drivers in 180 nm CMOS
Ryan Lee, Kate Tseng, Te Min Yu, Andrew Pan, Jiayi Wang, James Rosenthal, Kevin J Ho, Ang Li
2026 IEEE International Conference on RFID, Jun 2026
TransDot: An Area-efficient Reconfigurable Floating-Point Unit for Trans-Precision Dot-Product Accumulation for FPGA AI Engines
Jiayi Wang, Maohua Nie, Sin-Chen Lin, C. -J. Richard Shi, Ang Li
The 34th IEEE International Symposium on Field-Programmable Custom Computing Machines, May 2026
@article{Wang2026TransDot,
author = {Wang, Jiayi and Nie, Maohua and Lin, Sin-Chen and Shi, C. -J. Richard and Li, Ang},
doi = {10.48550/ARXIV.2605.07245},
year = {2026},
publisher = {arXiv},
title = {TransDot: An {Area}-efficient {Reconfigurable} {Floating}-{Point} {Unit} for {Trans}-{Precision} {Dot}-{Product} {Accumulation} for {FPGA} {AI} {Engines}},
url = {https://arxiv.org/abs/2605.07245},
}
Precision-aware Communication in CGRAs
Shwet Chitnis, Fergus Xu, Ayush Kulkarni, Jiayi Wang, Jingqun Zhang, Arjun Raje, Ang Li
The 34th IEEE International Symposium on Field-Programmable Custom Computing Machines, May 2026
DisagMoE: Computation-Communication overlapped MoE Training via Disaggregated AF-Pipe Parallelism
Zhichen Zeng, Chi-Chih Chang, Jiayi Wang, Zezhou Wang, Ningxin Zheng, Zheng Zhong, Cesar A. Stuardo, Dongyang Wang, Mohamed S. Abdelfattah, Haibin Lin, Banghua Zhu, Ang Li, Ziheng Jiang
@article{Zeng2026DisagMoE,
author = {Zeng, Zhichen and Chang, Chi-Chih and Wang, Jiayi and Wang, Zezhou and Zheng, Ningxin and Zhong, Zheng and Stuardo, Cesar A. and Wang, Dongyang and Abdelfattah, Mohamed S. and Lin, Haibin and Zhu, Banghua and Li, Ang and Jiang, Ziheng},
doi = {10.48550/ARXIV.2605.11005},
year = {2026},
publisher = {arXiv},
title = {DisagMoE: Computation-{Communication} overlapped {MoE} {Training} via {Disaggregated} {AF}-{Pipe} {Parallelism}},
url = {https://arxiv.org/abs/2605.11005},
}
STEP: Spatially Threaded Execution Pipeline
The 2026 Workshop on Languages, Tools, and Techniques for Accelerator Design, Mar 2026
PᴺCEL member
Equal contribution