Publications

@article{Mo2024LUT,	author = {Mo, Zhiwen and Wang, Lei and Wei, Jianyu and Zeng, Zhichen and Cao, Shijie and Ma, Lingxiao and Jing, Naifeng and Cao, Ting and Xue, Jilong and Yang, Fan and Yang, Mao},	doi = {10.48550/ARXIV.2408.06003},	year = {2024},	publisher = {arXiv},	title = {LUT {Tensor} {Core}: Lookup {Table} {Enables} {Efficient} {Low}-{Bit} {LLM} {Inference} {Acceleration}},	url = {https://arxiv.org/abs/2408.06003},}

@article{Zhu2025Tactic,	author = {Zhu, Kan and Tang, Tian and Xu, Qinyu and Gu, Yile and Zeng, Zhichen and Kadekodi, Rohan and Zhao, Liangyu and Li, Ang and Krishnamurthy, Arvind and Kasikci, Baris},	doi = {10.48550/ARXIV.2502.12216},	year = {2025},	publisher = {arXiv},	title = {Tactic: Adaptive {Sparse} {Attention} with {Clustering} and {Distribution} {Fitting} for {Long}-{Context} {LLMs}},	url = {https://arxiv.org/abs/2502.12216},}

@inproceedings{Li2024Fusion,
	author = {Li, Sixu and Zhao, Yang and Li, Chaojian and Guo, Bowei and Zhang, Jingqun and Zhu, Wenbo and Ye, Zhifan and Wan, Cheng and Lin, Yingyan Celine},
	booktitle = {2024 57th {IEEE}/{ACM} {International} {Symposium} on {Microarchitecture} ({MICRO})},
	doi = {10.1109/micro61859.2024.00016},
	year = {2024},
	month = {nov 2},
	pages = {78--91},
	organization = {IEEE},
	title = {Fusion-3D: Integrated {Acceleration} for {Instant} 3D {Reconstruction} and {Real}-{Time} {Rendering}},
	url = {http://dx.doi.org/10.1109/MICRO61859.2024.00016},
}

@article{Chen2024Allo,
	author = {Chen, Hongzheng and Zhang, Niansong and Xiang, Shaojie and Zeng, Zhichen and Dai, Mengjia and Zhang, Zhiru},
	journal = {Proceedings of the ACM on Programming Languages},
	doi = {10.1145/3656401},
	issn = {2475-1421},
	year = {2024},
	month = {jun 20},
	pages = {593--620},
	publisher = {Association for Computing Machinery (ACM)},
	title = {Allo: A {Programming} {Model} for {Composable} {Accelerator} {Design}},
	url = {http://dx.doi.org/10.1145/3656401},
	volume = {8},
}

@inproceedings{Zhao2023Instant,
	author = {Zhao, Yang Katie and Wu, Shang and Zhang, Jingqun and Li, Sixu and Li, Chaojian and Lin, Yingyan Celine},
	booktitle = {2023 60th {ACM}/{IEEE} {Design} {Automation} {Conference} ({DAC})},
	doi = {10.1109/dac56929.2023.10247710},
	year = {2023},
	month = {jul 9},
	pages = {1--6},
	organization = {IEEE},
	title = {Instant-{NeRF}: Instant {On}-{Device} {Neural} {Radiance} {Field} {Training} via {Algorithm}-{Accelerator} {Co}-{Designed} {Near}-{Memory} {Processing}},
	url = {http://dx.doi.org/10.1109/DAC56929.2023.10247710},
}

@inproceedings{Gao2023DECADES,
	author = {Gao, Fei and Chang, Ting-Jung and Li, Ang and Orenes-Vera, Marcelo and Giri, Davide and Jackson, Paul J. and Ning, August and Tziantzioulis, Georgios and Zuckerman, Joseph and Tu, Jinzheng and Xu, Kaifeng and Chirkov, Grigory and Tombesi, Gabriele and Balkind, Jonathan and Martonosi, Margaret and Carloni, Luca and Wentzlaff, David},
	booktitle = {2023 {IEEE} {Custom} {Integrated} {Circuits} {Conference} ({CICC})},
	doi = {10.1109/cicc57935.2023.10121257},
	year = {2023},
	month = {4},
	pages = {1--2},
	organization = {IEEE},
	title = {DECADES: A 67mm\textsuperscript{2}, 1.46TOPS, 55 {Giga} {Cache}-{Coherent} 64-bit {RISC}-{V} {Instructions} per second, {Heterogeneous} {Manycore} {SoC} with 109 {Tiles} including {Accelerators}, {Intelligent} {Storage}, and {eFPGA} in 12nm {FinFET}},
	url = {http://dx.doi.org/10.1109/CICC57935.2023.10121257},
}

@inproceedings{Chang2023CIFER,
	author = {Chang, Ting-Jung and Li, Ang and Gao, Fei and Ta, Tuan and Tziantzioulis, Georgios and Ou, Yanghui and Wang, Moyang and Tu, Jinzheng and Xu, Kaifeng and Jackson, Paul J. and Ning, August and Chirkov, Grigory and Orenes-Vera, Marcelo and Agwa, Shady and Yan, Xiaoyu and Tang, Eric and Balkind, Jonathan and Batten, Christopher and Wentzlaff, David},
	booktitle = {2023 {IEEE} {Custom} {Integrated} {Circuits} {Conference} ({CICC})},
	doi = {10.1109/cicc57935.2023.10121294},
	year = {2023},
	month = {4},
	pages = {1--2},
	organization = {IEEE},
	title = {CIFER: A 12nm, 16mm\textsuperscript{2}, 22-{Core} {SoC} with a 1541 {LUT6}/mm\textsuperscript{2} 1.92 {MOPS}/{LUT}, {Fully} {Synthesizable}, {CacheCoherent}, {Embedded} {FPGA}},
	url = {http://dx.doi.org/10.1109/CICC57935.2023.10121294},
}

@inproceedings{Li2021PRGA,
	author = {Li, Ang and Wentzlaff, David},
	booktitle = {The 2021 {ACM}/{SIGDA} {International} {Symposium} on {Field}-{Programmable} {Gate} {Arrays}},
	doi = {10.1145/3431920.3439294},
	year = {2021},
	month = {feb 17},
	pages = {127--137},
	organization = {ACM},
	title = {PRGA: An {Open}-{Source} {FPGA} {Research} and {Prototyping} {Framework}},
	url = {http://dx.doi.org/10.1145/3431920.3439294},
}

@article{Balkind2020OpenPiton,
	author = {Balkind, Jonathan and Chang, Ting-Jung and Jackson, Paul J. and Tziantzioulis, Georgios and Li, Ang and Gao, Fei and Lavrov, Alexey and Chirkov, Grigory and Tu, Jinzheng and Shahrad, Mohammad and Wentzlaff, David},
	journal = {IEEE Micro},
	doi = {10.1109/mm.2020.2997706},
	issn = {0272-1732},
	number = {4},
	year = {2020},
	month = {jul 1},
	pages = {22--31},
	publisher = {{Institute of Electrical and Electronics Engineers (IEEE)}},
	title = {OpenPiton at 5: A {Nexus} for {Open} and {Agile} {Hardware} {Design}},
	url = {http://dx.doi.org/10.1109/MM.2020.2997706},
	volume = {40},
}

@inproceedings{Li2020Cycle,
	author = {Li, Ang and Wentzlaff, David},
	booktitle = {Proceedings of the 2020 {ACM}/{SIGDA} {International} {Symposium} on {Field}-{Programmable} {Gate} {Arrays}},
	doi = {10.1145/3373087.3375354},
	year = {2020},
	month = {feb 23},
	pages = {322--322},
	organization = {ACM},
	title = {Cycle-{Free} {FPGA} {Routing} {Graphs}},
	url = {http://dx.doi.org/10.1145/3373087.3375354},
}

@inproceedings{Li2015Nonvolatile,
	author = {Li, Shuangchen and {Ang Li} and Liu, Yongpan and Xie, Yuan and {Huazhong Yang}},
	booktitle = {The 20th {Asia} and {South} {Pacific} {Design} {Automation} {Conference}},
	doi = {10.1109/aspdac.2015.7058999},
	year = {2015},
	month = {1},
	pages = {166--171},
	organization = {IEEE},
	title = {Nonvolatile memory allocation and hierarchy optimization for high-level synthesis},
	url = {http://dx.doi.org/10.1109/ASPDAC.2015.7058999},
}